Hi all,
Anybody knows if the ECC protection of L1 and L2 cahes in the raspi 4 SoC are implemented?
If yes, is there a way to disable/enable them?
Thank you
Anybody knows if the ECC protection of L1 and L2 cahes in the raspi 4 SoC are implemented?
If yes, is there a way to disable/enable them?
Thank you
Statistics: Posted by sergicuen — Sat Aug 23, 2025 11:45 am — Replies 0 — Views 106