In a bare metal application running on the Raspberry Pi 4 a connected firmware-driven DSI display occasionally stops working and goes black. The application heavily uses the memory bus by parallel DMA transfers and updates the contents of two un-cached frame buffers at a frame rate of at least 30 Fps using multiple CPU cores.
Is is possible that the update process of the DSI display stops, because the bus bandwidth is exhausted? Or if not, are there any data structures in main memory space, which is used by the GPU/VPU, which would trigger such a display update stop, when they would be destroyed due to application failure?
Is is possible that the update process of the DSI display stops, because the bus bandwidth is exhausted? Or if not, are there any data structures in main memory space, which is used by the GPU/VPU, which would trigger such a display update stop, when they would be destroyed due to application failure?
Statistics: Posted by rst — Mon May 05, 2025 6:20 am — Replies 1 — Views 51